AS3990/AS3991
1 General Description
The AS3990/AS3991 UHF reader chip is an integrated
analog front end and protocol handling systems for a
ISO18000-6C 900MHz RFID reader system.
Equipped with built-in programming options, the device
is suitable for a wide range of UHF RFID applications.
The AS3990/AS3991 includes improved on-board VCO
and internal PA.
The reader configuration is achieved by selecting the
desired protocol in control registers. Direct access to all
control registers allows fine tuning of different reader
parameters.
Parallel or serial interface can be selected for
communication between the host system (MCU) and the
reader IC. When hardware coders and decoders are
used for transmission and reception, data is transferred
via 24 bytes FIFO register.
In case of direct transmission or reception, coders and
decoders are bypassed and the host system can service
the analog front end in real time.
The transmitter generates 20dBm output power into 50Ω
load and is capable of ASK or PR-ASK modulation. The
integrated supply voltage regulators ensure supply
rejection of the complete reader system.
The transmission system comprises low level data
coding. Automatic generation of FrameSync, Preamble,
and CRC is supported.
The receiver system allows AM and PM demodulation.
The receiver also comprises automatic gain control
option (patent pending) and selectable gain and signal
bandwidth to cover a range of input link frequency and
bit rate options.
The signal strength of AM and PM modulation is
measured and can be accessed in RSSI register.
The receiver output is selectable between digitized sub-
carrier signal and any of integrated sub-carrier
decoders. Selected decoders deliver bit stream and data
clock as outputs.
The receiver system also comprises framing system.
This system performs the CRC check and organizes the
data in bytes. Framed data is accessible to the host
system through a 24 byte FIFO register.
To support external MCU and other circuitry a 3.3V
regulated supply and clock outputs are available. The
regulated supply has 20mA current capability.
The AS3990/AS3991 is available in a 64-pin QFN (9mm
x 9mm), ensuring the smallest possible footprint.
D a ta S he e t
U H F R F I D S i n g l e C h i p R e a d e r E P C C l a s s 1 G e n 2 C o m pa t i b l e
2 Key Features
ISO18000-6C (EPC Gen2) full protocol support
ISO18000-6A,B compatibility in direct mode
Integrated low level transmission coding
Integrated low level decoders
Integrated data framing
Integrated CRC checking
Parallel 8-bit or serial 4-pin SPI interface to MCU
using 24 bytes FIFO
Voltage range for communication to MCU between
1.8V and 5.5V
Selectable clock output for MCU
Integrated supply voltage regulator (20mA), which
can be used to supply MCU and other external
circuitry
Integrated supply voltage regulator for the RF output
stage, providing rejection to supply noise
Internal power amplifier (20dBm) for short range
applications
Modulator using ASK or PR-ASK modulation
Adjustable ASK modulation index
AM & PM demodulation ensuring no
“communication holes” with automatic I/Q selection
Built-in reception low-pass and high-pass filters
having selectable corner frequencies
Selectable reception gain
Reception automatic gain control
AD converter for measuring TX power using
external RF power detector
DA converter for controlling external power amplifier
Frequency hopping support
On-board VCO and PLL covering complete RFID
frequency range 840MHz to 960MHz
Oscillator using 20MHz crystal
Power down, standby and active mode
Can be powered by USB with no need for step
conversion
3 Applications
The device is an ideal solution for UHF RFID reader
systems and hand-held UHF RFID readers.
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Revision 3.81
1 - 51
AS3990/AS3991
Data Sheet - A p p l i c a t i o n s
Figure 1. Block Diagram
4xC
2xC
VDD_TXPAB
VDD_5LFI
COMN_A
COMN_B
COMP_A
COMP_B
VDD_MIX
CD1
CD2
OAD
OAD_2
ADC
DAC
64 2
31
30
58
4
1
3
5
53 52
13 15
VEXT
16 17
Supply
Regulators
&
References
VEXT2
AS3990/
AS3991
IQ Down
Conversion
Mixer
Gain
Filter
Digitizer
38
18
19
54
59
63
61
34
VDD_D
VDD_RF
VDD_B
AGD
VDD_A
VDDLF
VOSC
VDD_RFP
7xC
MIX_INP
MIX_INN
MIXS_IN
RFOUTN_1
RFOUTN_2
RFOUTP_1
RFOUTP_2
RFONX
RFOPX
EXT_IN
OCSI
OSCO
VCO
CP
7
9
10
27
28
20
21
32
33
56
36
37
AFE
RF Out
Digitizer
MCU Interface
RSSI
Directional
unit
51
41
42
43
44
45
46
47
48
50
39
40
49
VDD_IO
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
CLK
EN
IRQ
CLSYS
Micro
controller
Oscillator & Timing
System
EPC Gen2 Protocol
Handling
GEN-2
Frame Gen
24
Byte
FIFO
60
CRC
62
6 8 11 12 14 22 23 24 25 26 29 35 55 57 65
VSN_D
VSN_RFP
VSN_A
VSN_CP
VSS
VSS
VSN_MIX
CBIB
CBV5
VSN_1
VSN_2
VSN_3
VSN_4
EXP_PAD
VSN_5
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Revision 3.81
2 - 51
AS3990/AS3991
Data Sheet - A p p l i c a t i o n s
Contents
1 General Description
2 Key Features
3 Applications
.............................................................................................................................. 1
......................................................................................................................................... 1
........................................................................................................................................... 1
................................................................................................................................... 5
....................................................................................................................................................5
4 Pin Assignments
Pin Descriptions
5 Absolute Maximum Ratings
6 Electrical Characteristics
7 Detailed Description
Supply
.................................................................................................................. 8
....................................................................................................................... 9
............................................................................................................................ 11
.................................................................................................................................................................11
..........................................................................................................................................13
Power Modes .................................................................................................................................................12
Host Communication
VCO and PLL
......................................................................................................................................................13
VCO and External RF Source ........................................................................................................................13
PLL .................................................................................................................................................................13
Chip Status Control
Protocol Control
Transmitter
.............................................................................................................................................14
......................................................................................................................................14
..................................................................................................................................................14
Option Registers Preset
..........................................................................................................................................................14
Normal Mode ..................................................................................................................................................14
Direct Mode ....................................................................................................................................................16
Modulator .......................................................................................................................................................17
Amplifier .........................................................................................................................................................17
Receiver
..............................................................................................................................................................18
Input Mixer .....................................................................................................................................................18
RX Filter .........................................................................................................................................................18
RX Gain ..........................................................................................................................................................19
Received Signal Strength Indicator (RSSI) ....................................................................................................19
Reflected RF Level Indicator ..........................................................................................................................19
Normal Mode ..................................................................................................................................................19
Direct Mode ....................................................................................................................................................21
Normal Mode With Mixer DC Level Output And Enable RX Output Available ...............................................21
ADC / DAC
..........................................................................................................................................................21
DA Converter .................................................................................................................................................21
AD Converter .................................................................................................................................................22
Reference Oscillator
...........................................................................................................................................22
8 Application Information
....................................................................................................................... 23
.............................................................................................................23
......................................................................................25
.............................................................................................................................24
Configuration Registers Address Space
Main Configuration Registers
Status Registers
Test Registers
Control Registers - Low Level Configuration Registers
..................................................................................................................................................29
.....................................................................................................................................................32
.........................................................................................................33
...........................................................................................................................................36
.......................................................................................................................................37
PLL, Modulator, DAC, and ADC Registers
RX Length Registers
Direct Commands
FIFO Control Registers
...............................................................................................................................................38
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Revision 3.81
3 - 51
AS3990/AS3991
Data Sheet - A p p l i c a t i o n s
Idle (80) ..........................................................................................................................................................39
Soft Init (83) ....................................................................................................................................................39
Hop to Main Frequency (84) ..........................................................................................................................39
Hop to Auxiliary Frequency (85) .....................................................................................................................39
Trigger AD Conversion (87) ...........................................................................................................................39
Reset FIFO (8F) .............................................................................................................................................39
Transmission With CRC (90) ..........................................................................................................................39
Transmission With CRC Expecting Header Bit (91) .......................................................................................40
Transmission Without CRC (92) .....................................................................................................................40
Delayed Transmission With CRC (93) ...........................................................................................................40
Delayed Transmission Without CRC (94) ......................................................................................................40
Block RX (96) .................................................................................................................................................40
Enable RX (97) ...............................................................................................................................................40
EPC GEN2 Specific Commands
.........................................................................................................................40
Query (98) ......................................................................................................................................................40
QueryRep (99) ...............................................................................................................................................40
QueryAdjustUp (9A) .......................................................................................................................................40
QueryAdjustNic (9B) ......................................................................................................................................41
QueryAdjustDown (9C) ..................................................................................................................................41
ACK (9D) ........................................................................................................................................................41
NAK (9E) ........................................................................................................................................................41
ReqRN (9F) ....................................................................................................................................................41
Reader Communication Interface
Parallel Interface Communication
Serial Interface Communication
.......................................................................................................................41
.......................................................................................................................43
..........................................................................................................................45
Timing Diagrams ............................................................................................................................................46
Timing Parameters .........................................................................................................................................47
FIFO
....................................................................................................................................................................47
9 Package Drawings and Markings
10 Ordering Information
....................................................................................................... 48
......................................................................................................................... 50
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Revision 3.81
4 - 51
AS3990/AS3991
Data Sheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
COMP_A
VSN_CP
EXT_IN
VDD_IO
51
VDD_A
VDDLF
VOSC
VSN_A
VCO
ADC
AGD
CD1
64
63
61
60
59
62
58
56
55
54
57
53
50
CLK
COMN_A
COMP_B
COMN_B
DAC
VDD_5LFI
VSS
MIX_INP
VSS
MIX_INN
MIXS_IN
VSN_MIX
CBIB
VDD_MIX
CBV5
VDD_TXPAB
VEXT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
18
20
17
21
22
19
23
25
26
27
28
24
30
31
29
32
52
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
CLSYS
CP
CD2
IO7
IO6
IO5
IO4
IO3
IO2
IO1
IO0
IRQ
EN
VDD_D
OSCO
OSCI
VSN_RFP
VDD_RFP
RFOPX
AS3990/AS3991
RFOUTN_2
RFOUTN_1
RFOUTP_1
Pin Descriptions
Table 1. Pin Descriptions
Pin Name
COMN_A
COMP_B
COMN_B
DAC
VDD_5LFI
VSS
MIX_INP
VSS
MIX_INN
MIXS_IN
VSN_MIX
CBIB
VDD_MIX
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
Pin Type
BID
BID
BID
OUT
SUPI
SUPI
INP
SUPI
INP
INP
SUPI
BID
SUPO
DAC output for external amplifier support, Output Resistance of DAC
pin is 1kΩ
Positive supply for LF input stage, connect to VDD_MIX
Substrate
Differential mixer positive input
Substrate
Differential mixer negative input
Single ended mixer input
Mixer negative supply
Internal node de-coupling capacitor to GND
Mixer positive supply, internally regulated to 4.8V
Connect de-coupling capacitor to VDD_5LFI
Description
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RFOUTP_2
VDD_RF
Revision 3.81
RFONX
VSN_3
VDD_B
VSN_D
VSN_2
VSN_1
VSN_5
OAD2
VEXT2
VSN_4
OAD
5 - 51
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